Publications G. Panicker, K.V. Krishna and P. Bhaduri, On the structure of Calgebras through atomicity and ifthenelse, Algebra Universalis, Springer, 81:22, 2020. L. Behera and P. Bhaduri, An energyefficient timetriggered scheduling algorithm for mixedcriticality systems, Design Automation for Embedded Systems, Springer, 24(2), pp 79–109, 2020. R. Chouksey, C. Karfa, K. Banerjee, P.K. Kalita and Purandar Bhaduri, Counterexample generation procedure for pathbased equivalence checkers, IET Softw. 13(4): 280285, 2019. R. Chouksey, C. Karfa and P. Bhaduri, Improving Performance of a PathBased Equivalence Checker using CounterExamples, VLSI Design 2019, IEEE. R. Chouksey, C. Karfa and P. Bhaduri, Translation Validation of Code Motion Transformations Involving Loops, IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, 38(7), 2019. R. Chouksey, C. Karfa and P. Bhaduri, Formal Verification of Optimizing Transformations during Highlevel Synthesis, 27:127:5, ISEC 2019. G. Panicker, K.V. Krishna and P. Bhaduri, Monoids of nonhalting programs with tests, Algebra Universalis, 79:8, March 2018, Springer. L. Behera and P. Bhaduri, TimeTriggered Scheduling for Multiprocessor MixedCriticality Systems, International Conference on Distributed Computing and Internet Technology (ICDCIT 2018), LNCS 10722, Springer, pages 135151, 2018. (This is a revised version of the paper where the statement and proof of Theorem 5 has been corrected.) R. Chouksey, C. Karfa and P. Bhaduri, Translation Validation of Loop Invariant Code Optimizations Involving False Computations, 21st International Symposium on VLSI Design and Test (VDAT 2017), CCIS 711, Springer, pages 767778, 2017. L. Behera and P. Bhaduri, TimeTriggered Scheduling of MixedCriticality Systems, ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 22 Issue 4, June 2017. G. Panicker, K.V. Krishna and P. Bhaduri, Axiomatization of ifthenelse over possibly nonhalting programs and tests, International Journal of Algebra and Computation, Volume 27, Issue 03, May 2017. D. Majumdar, L. Zhang, P. Bhaduri and S. Chakraborty, Reconfigurable Communication Middleware for FlexRaybased Distributed Embedded Systems, 21st IEEE International Conference on Embedded and RealTime Computing Systems and Applications, RTCSA 2015. P. Swain, S. Chakraborty, S. Nandi and P. Bhaduri, Performance Modeling and Analysis of IEEE 802.11 IBSS PSM in Different Traffic Conditions. IEEE Transactions on Mobile Computing 14(8): 16441658, 2015. I. Stierand, P. Reinkemeier and P. Bhaduri, Virtual Integration of RealTime Systems Based on Resource Segregation Abstraction. Formal Modeling and Analysis of Timed Systems, FORMATS 2014, LNCS 8711, pages 206221. P. Swain, P. Bhaduri, and S. Nandi, Probabilistic Model Checking of IEEE 802.11 IBSS Power Save Mode, International Journal of Wireless and Mobile Computing, Vol 7, No. 5, pages 465474, 2014. P. Swain, S. Chakraborty, S. Nandi, and P. Bhaduri, Performance Modeling and Evaluation of IEEE 802.11 IBSS Power Save Mode, Ad Hoc Networks, Elsevier, Volume 13, Part B, February 2014, Pages 336–350. D. Goswami, S. Chakraborty, P. Bhaduri and S. K. Mitter, Characterizing Feedback Signal Drop Patterns in Formal Verification of Networked Control Systems, Invited CACSDSU Session on Formal Methods for CyberPhysical Systems, 2013 IEEE MultiConference on Systems and Control (MSC 2013) August 2013. I. Stierand, P. Reinkemeier, T. Gezgin and P. Bhaduri, RealTime Scheduling Interfaces and Contracts for the Design of Distributed Embedded Systems, 8th IEEE International Symposium on Industrial Embedded Systems, June 2013. P. Swain, S. Chakraborty, S. Nandi, and P. Bhaduri, Performance Analysis of IEEE 802.11 IBSS Power Save Mode using a DiscreteTime Markov Model, 27th ACM Symposium On Applied Computing, SAC 2012. P. Swain, S. Chakraborty, S. Nandi, and P. Bhaduri, Throughput Analysis of the IEEE 802.11 Power Save Mode in Single Hop Ad hoc Networks, 10th International Conference on Wireless Networks, ICWN 2011.
V. R. Anwikar and P.
Bhaduri, Timing
Analysis of RealTime Embedded Systems using Model Checking, 18th
International Conference on RealTime and Network Systems, RTNS 2010. P. Bhaduri and D.B. Chokshi and P. Bhaduri, Performance Analysis of FlexRaybased systems using RealTime Calculus, Revisited, 25^{th} ACM Symposium on Applied Computing (SAC) 2010. D.B. Chokshi and P. Bhaduri, Modeling Fixed Priority NonPreemptive Scheduling with RealTime Calculus, 14th IEEE International Conference on Embedded and RealTime Computing Systems and Applications, RTCSA 2008, IEEE Computer Society Press. P. Bhaduri and P. Bhaduri, Schedule Verification and Synthesis for Embedded RealTime Components,
in Next Generation Design and Verification Methodologies for Distributed
Embedded Control Systems: Proceedings of the GM R&D Workshop, Springer,
January 2007. © SpringerVerlag. R.K. Poddar and P. Bhaduri, Verification of Giotto based Embedded Control Systems, Nordic Journal of Computing, Volume 13, No. 4, Winter 2006. P. Bhaduri and S. Ramesh, Synthesis of Synchronous Interfaces (corrected and revised), ACSD 2006, Sixth International Conference on Application of Concurrency to System Design, pp 208 – 216, Turku, Finland, June 2630, 2006, IEEE Computer Society Press. P. Bhaduri, Synthesis of Interface Automata (corrected and revised), Third International Symposium on Automated Technology for Verification and Analysis (ATVA 2005), Taipei, Taiwan, Lectures Notes in Computer Science, Vol. 3707, pp 338353, SpringerVerlag, October 2005. G. Palshikar and P. Bhaduri,
Verification of
Scenariobased Specifications using Templates, International Workshop on
Software Verification and Validation (SVV 2003), Mumbai, December 2003.
Appeared in Volume 118 of Electronic Notes in Theoretical Computer Science, Elsevier,
Pages 3755 (1 February 2005). U. Shrotri, P. Bhaduri and R. Venkatesh,
Model
Checking Visual Specification of Requirements, International Conference on
Software Engineering and Formal Methods, P. Bhaduri and R. Venkatesh,
Formal Consistency of
Models in MultiView Modelling, <<UML>> 2002 Workshop on
CONSISTENCY PROBLEMS IN UMLBASED SOFTWARE DEVELOPMENT, October 1, 2002,
Dresden, Germany, Blekinge Institute of Technology Research Report, pp 149159,
2002. P. Bhaduri, R. Venkatesh and G. Palshikar, Formal Techniques for Analysing Scenarios using Message Sequence Charts, ETAPS Workshop on Validation and Implementation of Scenariobased Specifications, VISS 2002, Grenoble, France, April 2002. Appeared in Electronic Notes in Theoretical Computer Science Volume 65, Issue 7, Elsevier. R. Venkatesh, P. Bhaduri and Mathai Joseph,
Formalizing Models and Metamodels for System Development, Extended Abstract
(Invited Talk), Proceedings Eighth AsiaPacific Software Engineering
Conference (APSEC), Macao, China, pp 155  158, IEEE Computer Society,
December 2001. S. Ramesh and P. Bhaduri, Validation of
Pipelined Processor Designs using Esterel Tools: A Case Study,
Computer Aided Verification CAV'99, Trento, Italy, Lectures Notes in Computer Science, Vol.
1633, pp 84  95, SpringerVerlag, July 1999. M. G. Nanda, P. Bhaduri, S. Oberoi and A. Sanyal,
An Application of Compiler Technology to the Year 2000 Problem, Software
Practice and Experience, Vol 29, No 4, 1999, pp
359377. S. Ramesh, S.S.P. Rao, G. Sivakumar and P.
Bhaduri, Formal Specification and Verification of Hardware Designs,
Proceedings of SPIE, Vol 3412, Photomask
and XRay Mask Technology V, pp 261268, Kawasaki, Japan, 1998. 
