Program Details
Dates: 09-11 March, 2015.
Venue: Conference Center, Indian Institute of Technology Guwahati, Assam, India.
| Day 1 (9th March 2015)
|
| Time | Event |
8:30 AM - 9:30 AM | Breakfast |
9:30 AM - 10:30 AM | Inauguration | |
10:30 AM - 11:00 AM | High Tea |
11:00 AM - 13:00 PM |
CMOS Devices and Technology: Current Status and Future Challenges, Dr. Deleep R. Nair,
IIT Madras |
13:00 PM - 14:00 PM | Lunch |
14:00 PM - 15:30 PM
| Introduction to Digital CMOS Circuits,
Prof. D. Nagchoudhuri, IIT Delhi
|
15:30 PM - 16:00 PM | Tea |
16:00 PM - 17:30 PM
| On Chip Data Communication, Prof. D. K. Sharma |
| | | | | | |
| Day 2 (10th March 2015) |
| Time | Event |
8:30 AM - 9:30 AM | Breakfast | |
9:30 AM - 11:00 AM | VLSI Testing,
Dr. Santosh Biswas, IIT Guwahati
|
11:00 AM - 11:30 AM |
Tea |
11:30 AM - 13:00 PM |
VLSI-CAD,
Dr. Arnab Sarkar, IIT Guwahati
|
13:30 PM - 14:00 PM
| Special Lunch
|
14:00 PM - 15:30 PM |
IC Fabrication, Mr. H. S. Jatana |
15:30 PM - 16:00 PM
| Tea |
16:00 PM - 17:30 PM
| Analog Circuit Design, Mr. H. S. Jatana |
| | | | | | |
| Day 3 (11th March 2015) |
| Time | Event |
8:30 AM - 9:30 AM | Breakfast | |
9:30 AM - 11:00 AM |
21st Century Computer Architecture,
Dr. Virendra Singh, IIT Bombay
|
11:00 AM - 11:30 AM |
Tea |
11:30 AM - 13:00 PM |
Fault Tolerant Architectures,
Dr. Virendra Singh, IIT Bombay
|
13:30 PM - 14:00 PM
| Lunch
|
14:00 PM - 15:30 PM |
Multiprocessor Cache Architectures,
Dr. Hemangee K. Kapoor, IIT Guwahati
|
15:30 PM - 16:00 PM
| Tea |
16:00 PM - 17:00 PM
| Parallel VLSI Power Grid Simulation,
Dr. Gaurav Trivedi, IIT Guwahati
|
17:00 PM - 17:15 PM
| Valedictory |
| | | | | | | |
Program Details(pdf)
