TEQIP-III Sponsored 5-day Short Term Course on Advanced Computer Architecture,
December 10 - 14, 2018.

Download from here Brochure || Application Form DOC, PDF || Endorsement Form DOC, PDF

Latest Updates || Final List of Candidates || Detailed Daywise Program.

Registration starts at 9.30 am on 10.12.2018 (Monday). Program Venue is at CSE Department Seminar Hall Google Map Location.
Accommodation for faculty from TEQIP mapped institutions is arranged at Hotel President, Pan Bazar, Guwahati city. Google Map Location || Accommodation List
Accommodation for students and participants from other institutes are arranged at new-guest house, IIT Guwahati campus. Google Map Location || Accommodation List

Shortlisted candidates may plan their travel to Guwahati such that they should reach the respective accommodation venue latest by 09.12.2018, 4 PM. They can plan their return trip anytime after 14.12.2018, 6 PM. Guwahati experiences winter climate during the December with day time temperature going upto 25 degrees and night temperature falling upto 10 degrees. Carry appropriate winter clothing. Sunrise is around 6:00 AM and sunset is around 4:30 PM.

Course Objective

The primary objective of the short term course is to provide an understanding of the architecture and design of multicore processors. It covers the advancements in computer architectures in detail starting from the simple scalar processors to the latest multicore superscalar processors and GPUs. As a case study, the microarchitecture of some of the latest processors will be discussed in detail. Finally, the course will explore the state of art research issues related to multi-core architectures. The course will provide a platform for faculty, teaching computer organization and architecture in various technical institutes in sharing the best practices for effective delivery of the subject. Pedagogy sessions arranged as part of the course will facilitate professional way of teaching computer architecture. The course will also provide a forum for long term association with MARS Research Lab, IIT Guwahati in terms of student internship, collaborative research and combined mentoring of student projects. The course coordinators will provide external mentorship to few such student projects based on request from participating members.

Key Resource Persons
  • Prof. Jatindra Kr. Deka, Professor, IIT Guwahati.
  • Prof. Hemangee K. Kapoor, Professor, IIT Guwahati.
  • Dr. Arnab Sarkar, Associate Professor, IIT Guwahati.
  • Dr. Aryabartta Sahu, Associate Professor, IIT Guwahati.
  • Dr. John Jose, Assistant Professor, IIT Guwahati.
  • Ph.D scholars from Computer Architecture and Embedded Systems Research Group, IIT Guwahati.
Course Contents
  • Day 1: Evolution of processors and introduction to instruction pipeline, static and dynamic instruction scheduling, superscalar processor, branch prediction techniques.
  • Day 2: Introduction to cache memory systems, design issues, optimization techniques, coherence techniques.
  • Day 3: Introduction to TCMP systems, Network on chip architectures, GPUs & vector processors.
  • Day 4: Concepts in main memory design, memory scheduling concepts. Recent research trends in Advanced Computer Architecture.
  • Day 5: Research road map ahead in multicore computer architecture, effective teaching pedagogies and curriculum development.
Course Overview and Organization

The course provides the participants with an appreciation of modern computer design and its relation to system architecture, compiler technology and operating system functionality. It is structured such that even faculty without much exposure to computer organization and architecture could explore and appreciate the recent advances in computer architecture. Special emphasis is given on design aspect of basic hardware components based on the measurement of performance and its dependency on parallelism, efficiency, latency and resource utilization. To facilitate this, tutorial sessions with numerical design problems are arranged every day to understand the concepts in depth. Special sessions are there devoted to the discussion of state of art research issues related to multi-core architectures. The course would like to bring faculty teaching the subject computer organization and architecture in various participating institutes under one umbrella and share the best practices in the delivering the subject in a more effective way.

Eligibility, Registration & Selection

The course is open to faculty members of TEQIP mapped institutions. Please refer to "Institution List" link in the NPIU website for list of TEQIP mapped institutions. However, PhD scholars/PG students from these institutions may be accommodated subject to the vacancy of seats. There will be a refundable registration fee of 2500 INR for the participants from TEQIP mapped institutions. Seats that remain unfilled will be open to faculty/students of other institutions with a non-refundable registration fee of 2500 INR. There will be total 40 seats for the course which will be filled based on first come first serve basis. The registration fee will cover course materials and working lunch.

How To Apply?

1. Take a Demand Draft of 2500 INR drawn in favour of Registrar, IIT Guwahati, payable at Guwahati towards registration fee.
2. Download the course Application Form and fill-up (typesetting is preferred over handwritten) all the entries including DD details.
3. Generate a pdf document of the filled up application form and take a printout of the same.
4. Affix your recent passport size color photograph and put your signature in the respective cells.
5. Download the course Endorsement Form and get it duly approved and signed by the head of your institution. Seal of the institute is mandatory.
6. Send the documents and DD via speedpost to the course cordinator (postal address given below) so as to reach IIT Guwahati latest by 21.11.2018 (Wednesday).
7. Send a soft copy (preferrably pdf) of the duly filled application form to siva17191@gmail.com.
8. Fill this Intimation Form after you have sent the application form and the DD via post.

List of selected candidates after Round-III will be displayed on this website by 22.11.2018. No separate emails will be sent regarding this.
Registration Fee DD will be returned back (via speed post), if the candidate is not shortlisted.

Boarding & Lodging

For participants from TEQIP mapped institutions, based on request, accommodation can be arranged free of cost either in the student hostels inside IITG campus or in hotels at Guwahati city. Participants from non-TEQIP institutes should make their own arrangements for boarding and lodging. However they may contact the accommodation and registration support team (details given below) for necessary help and inputs.

Course Coordinator

Dr. JOHN JOSE, [HomePage]
Assistant Professor,
Department of Computer Science & Engineering,
IIT Guwahati, Guwahati, Assam 781039.
Email: johnjose@iitg.ac.in, johnjose004@gmail.com
Mobile: 9048665842, 9476950747

Accommodation and registration support team

Mr. Sivakumar S. (8547185936 / 8848427144),
Mrs. Manju R. (9961330220),
Ph.D scholars, MARS Research Lab,
Department of Computer Science & Engineering,
IIT Guwahati, Guwahati, Assam 781039.
Email: siva17191@gmail.com, manjurajanv@gmail.com