Sl No and Demo Date | Weight | Part I | Part II | |
1 (12th Jan) | 10% (5+5) | Circuit Design using Breadboard and ICs | Circuit Design using FPGA and Xillinx Soft | Assignment Statement PDF, [[Evaluation Sheets]] |
2 (25th Jan) | 10% (5+5) | Circuit Design using Breadboard and ICs | Circuit Design using FPGA and Xillinx Soft | Assignment Statement PDF [[EvaluationSheets]] |
3 (09th Feb) | 12% (6+6) | Circuit Design using Breadboard and ICs | Circuit Design using FPGA and Xillinx Soft | Assignment Statement PDF [[ EvaluationSheets]] |
4 (23rd Feb) | 14% (7+7) | Circuit Design using Breadboard and ICs | Circuit Design using FPGA and Xillinx Soft | Assignment Statement PDF [[ EvaluationSheets]] |
5 (16th Mar) | 10% | MFU design using FPGA and Xillnx Soft | Assignment Statement PDF [[ EvaluationSheets]] |
6 (06th Apr) | 12% | Cache design using FPGA and Xillnx Soft | Assignment Statemet PDF, Cache.cpp [[ EvaluationSheets]] |
7 (20th Apr) | 12% | Design intrusion detection system (IDS) using FPGA and Xillnx Soft | Assignment Statement PDF, Input file [[EvaluationSheets]] |
27th April Friday | 20% | Written Test (Date=27 April, Venue=Lecture Hall 4, Time=4PM-5PM) |