Biodata (Tutorial 1)

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Sampath Dakshinamurthy is a technical lead in the Scalable Performance CPU Design Group at Intel Technology India. He has been the lead designer for multiple generations of high speed I/O controllers designed in this group. He had also been leading the CDC design and verification efforts for the high speed designs that the group is involved with. He has co-authored the paper: A 32nm Westmere-EX Xeon Enterprise Processor,  published at ISSCC2011. He has been a member of IEEE since 2002.

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Jais Abraham is a technical lead in the Scalable Performance CPU Design Group at Intel Technology India with primary focus on Design for Testability of high speed/ low power microprocessors. Prior to his stint at Intel, he was a Principal Member of Technical Staff at AMD India Design Centre and a Member Group Technical Staff at Texas Instruments India. He has co-authored multiple papers in IEEE conferences.

 

 

Biodata (Tutorial 2)

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Sujay Deb is currently an Assistant Professor in the department of Electronics and Communication Engineering at Indraprastha Institute of Information Technology, Delhi, India. He received his PhD degree from Washington State University, USA in 2012. He received his MS degrees from the Indian Institute of Technology, Kharagpur, India, in 2007. His broader research interest in the design of novel interconnect architectures for multicore chips. He is a member of IEEE.

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Hemanta Kumar Mondal is currently working toward the PhD degree in Electronics and Communication Engineering at Indraprastha Institute of Information Technology, Delhi. He received his M.Tech. in VLSI Design from Guru Gobind Singh Indraprastha University, Delhi, India. His broader research interests in the design of efficient interconnect architectures for multicore chips. He is a member of IEEE and also president of IEEE student chapter at IIITD.

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Sri Harsha Gade is currently pursuing his PhD degree in Electronics and Communication Engineering from Indraprastha Institute of Information Technology Delhi, New Delhi, India. He received B.E. degree in ECE in 2010 from GITAM University, Vishakapatnam, India and M. Tech degree in VLSI & Embedded Systems in 2014 from IIIT Delhi, New Delhi, India. His research interests include multicore architectures, networks-on-chip and on-chip wireless interconnects. He is a student member of IEEE

 

 

Biodata (Tutorial 3)

 

Yadav Preet, has been involved in diversify VLSI domains of, CAD, AMS design & verification, and core technology development throughout his 12+ years hands-on experiences.

He received his B. Tech. degree in ECE from Kurukshetra University and M. Tech. degree in VLSI Design & CAD from Thapar University, Patiala.

He worked at Semiconductor Complex Ltd. and, Cadence Design Systems. In 2008, he joined Freescale Semiconductor (now part of NXP group of companies), worked on Process Design Kits, leading handful of technologies from matured to advance nodes. Presently he is working on Analog and Mixed Signal SOC Verification.

He has received President Award in Scouts & Guides, fellowship for VDAT 2005 and certifications of merit. He has 10+ publications in international/national conferences, with two best paper awards on his name. He is lifetime member of Indian Microelectronics Society (IMS) and The Institution of Electronics Telecommunication Engineers (IETE).

 

Chi-Min (Chi) Yuan, PhD has been involved in physical design, OPC and lithography throughout his 20+ years in the industry, mostly through hands-on experiences.  He obtained his PhD degree in Electrical and Computer engineering from Carnegie Mellon University. 

After graduation, he worked in IBM East Fishkill as a lithography engineer.  He joined Motorola Austin and was assigned to SEMATECH to manage part of the phase shift mask program.  Later, he led a process integration team to develop lithography processes in Motorola APRDL.  He joined Precision Semiconductor Mask Corp. as a marketing director. 

In 2000, he joined Freescale Austin and led an engineering team to develop OPC technologies.  Since 2007, he has been working in the areas of design enablement, physical design and design for manufacturing.

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Biodata (Tutorial 4 & Tutorial 8)

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HS Jatana  Received his engineering education from BITS Pilani. Worked at AMS Austria for porting of SCL’s CMOS processes at their foundry. Had vast experience on CMOS design, testing, characterization and failure analysis, process development / porting and integration.

 

Presently, as Groupl Head at SCL  is responsible for design of VLSI products (ASICS and standard products).

 

His areas of interest are analog design, development of compatible add-on process options compatible to standard CMOS flow and Process Integration issues in DSM era.

 

Also interested in spreading VLSI education and have delivered numerous lectures on VLSI at various Institutes.

 

Deep Sehgal during his more than 17 years of experience in design, he has worked upon many projects in various domains on 3.0 um to 0.18um of technology nodes.

 

His first major work was in Biomedical field for the design of ultra low power Pacemaker chip; wherein he designed 0.7µA bias current opamp, Switched capacitor based full wave rectifier, Switched capacitor based VCO and Telemetry transceiver.

 

He has been involved in multi-disciplinary project for development of Infrared Camera System for night vision application. Here he was to design a Read-Out Integrated Circuit (ROIC) for infrared detectors with operation of chip at Liquid Nitrogen Temperature of 77K.

 

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Md Asim Saeed Received B.E. degree in Electronics and Comm. from Jamia Millia Islamia, New Delhi and M.Tech. Degree in Circuit and Systems Design from Aligarh Muslim University, Aligarh in 2004 and 2006, respectively. I joined Semi-Conductor Laboratory, Mohali in 2006 as Scientist/Engineer.

Since last ten years I am working in the field of Analog and Mixed Signal Design. I have been associated with development of many ASICs, IPs and standard products such as CMOS MEMS Integration, Sigma Delta ADC with on chip Signal Conditioning and Processing Circuitry,

Capacitance-to-Digital Converter.

 

 

Biodata (Tutorial 5)

Indranil

 

Indranil Sengupta obtained his B.Tech., M.Tech. and PhD degrees in Computer Science from the University of Calcutta in the years 1983, 1985 and 1990, respectively. He joined Indian Institute of Technology, Kharagpur, as a faculty member in 1988, in the Department of Computer Science and Engineering, where he is presently a Full Professor. He is also the Managing Director of the Science and Technology Entrepreneurship Park (STEP) of the Institute. He has been the former Heads of the Department of Computer Science and Engineering, and School of Information Technology. He has over 27 years of teaching and research experience, guided 20 PhD students and published over 175 papers in peer reviewed journals and conferences. He has served as the Program Chair / General Chair in several Conferences in the areas of VLSI design and information security, and delivered a number of invited and tutorial talks in conferences and seminars. His research interests include reversible and quantum computing, VLSI design and test, and network security. He is a Senior Member of the IEEE.

 

Kamalika

 

Kamalika Datta is an Assistant Professor in the Department of Computer Science and Engineering at National Institute of Technology, Meghalaya. She completed her B.Sc. (Computer Science) from Ravenshaw College, Cuttack in the year 2003, Master of Computer Application (MCA) from Biju Pattanaik University of Technology, Bhubaneswar in the year 2006, and then Master of Science (MS) degree from Indian Institute of Technology, Kharagpur, in 2010. She completed her Ph.D. from the Indian Institute of Engineering Science and Technology (formerly BESU), Shibpur, in 2014. She has been a member of an Indo-German bilateral research project funded by DST-DAAD during the period 2013-2015, and visited University of Bremen during October-November 2013, September-October 2014, and again during June-July 2015. She attended the prestigious Heidelberg Laureate Forum in Heidelberg, Germany in 2014. She has published more than 35 papers in refereed journals and conferences. She delivered a tutorial talk on reversible logic synthesis at the VDAT-2014 Conference in Coimbatore. Her current research interests include reversible/ quantum logic synthesis and optimization, memristor based design, and information security. She is a Member of the IEEE.

 

Amlan

 

Amlan Chakrabarti is an Associate Professor and Coordinator at the Department of Information Technology, University of Calcutta. He is also the Principal Investigator of the Centre of Excellence in Systems Biology and Bio-Medical Engineering, and also the Coordinator of the Integrated Circuits and System Design Research Facilities of University of Calcutta. He is an M.Tech. from the University of Calcutta and has done his Doctoral research on Nano-computing and Nano-scale VLSI design at Indian Statistical Institute, Kolkata, 2004-2008. He was a Post-Doctoral fellow at the School of Engineering, Princeton University, USA during 2011-2012. He is the recipient of BOYSCAST fellowship award in the area of Engineering Science from the Department of Science and Technology Govt. of India, 2011 and INSA Visiting Scientist Award, 2014. He is a Senior Member of IEEE. He has published around 60 research papers in referred journals and conferences and has presented around 30 invited lectures in international and national venues. His research interests are quantum computing, VLSI design, embedded systems design, image and video processing algorithms and architectures.

 

 

Biodata (Tutorial 6)

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S. Dasgupta, is presently working as an Associate Professor, in the Department of Electronics and Communication Engineering at Indian Institute of Technology, Roorkee. He received his PhD degree in Electronics Engineering from Indian Institute of Technology-Banaras Hindu University, Varanasi in 2000. During his PhD work, he carried out research in the area of effects of ionizing radiation on MOSFET. Subsequently, he was member of faculty of Department of Electronics Engg., at Indian School of Mines, Dhanbad. In 2006, he joined as an Assistant Professor in the Department of Electronics and Communication Engineering at Indian Institute of Technology, Roorkee. He is currently the group head of Microelectronics and VLSI of the Department. He is also the Chairman, Departmental Academic Programme Committee. He was the Chairman of the Faculty Search Committee of the Department. He has authored/co-authored more than 200 research papers in peer reviewed international journals and conferences. He is a member of IEEE, EDS, ISTE and associate member of Institute of Nanotechnology, UK. He has been a technical committee member International Conference on Micro-to-Nano, 2006; he is also been nominated as Marquis Who’s Who in Science in Engineering, USA awarded by Marquis, 2006, 2007 and 2008 and has been acting as an expert member of The Global Open University, The Netherlands. He was awarded with Erasmus Mundus Fellowship of European Union in the year 2010 to work in the area of RDF at Politecnico Di Torino, Italy. He is the recipient of prestigious IUSSTF to work in the area of SRAM testing at University of Wisconsin at Madison, USA in the year 2011-12. He was also awarded with DAAD Fellowship to work on Analog Design using Reconfigurable Logic at TU, Dresden, Germany in the year 2013. He is the Principal Coordinator for SMDP-C2SD at IIT Roorkee which is a multi institutional project for system development, sponsored by DeiTy, Government of India.  As Pi or Co-PI he has completed projects worth 5 crores approximately.

His areas of interest are Nanoelectronics, Nanoscale MOSFET modeling and simulation, Design and Development of low power novel devices, FinFET based Memory Design, Emerging Devices in Analog Design and Design and development of reconfigurable logic. He has guided 14 Ph.D scholars. Currently he is supervising around 6 candidates leading to their Ph.D degree. He has been nominated for INAE, Young Engineer Award. Dr. Dasgupta acted as a reviewer for IEEE Transactions on Electron Devices, IEEE Electron Device Letters, IEEE Transactions on Nanotechnology, Superlattice and Microstructures, International Journal of Electronics, Semiconductor Science and Technology, Nanotechnology, IEEE Transactions on VLSI Systems, Microelectronic Engineering, Microelectronic Reliability amongst other. He has also been member of technical committees of various international conferences. He has presented tutorial in VDAT-2014 and VLSI Design Conference, Bangalore 2015, Prime Asia 2015 amongst many others.

 

 

 

Biodata (Tutorial 7)

hasan

 

Mohd. Hasan received the B.Tech. degree in Electronics Engineering from Aligarh Muslim University, Aligarh, India, in 1990, the M.Tech. degree in Integrated Electronics and Circuits from the Indian Institute of Technology Delhi, India, and the Ph.D. degree on “Low-Power Architectures for Multicarrier Systems” under a Commonwealth Scholarship, from the University of Edinburgh, U.K., in 2004. He has been a Full Professor at AMU since 2005. From 2008 to 2009, he was a Visiting Postdoctoral Researcher on a project funded by the prestigious Royal Academy of Engineering, U.K., on “Low power field programmable gate array (FPGA) architecture” with the School of Engineering, University of Edinburgh. He is the author of more than 134 research papers in reputed journals and conference proceedings that includes 11 IEEE Transactions along with four filed Indian patents on low power magnetic memories/SRAM. He received both the best International Journal paper and International Conference paper awards. His research interests include Low Power VLSI Design, Nanoelectronics, Battery-less Electronics along with Spintronics.

 

 

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Mohd. Samar Ansari  received B.Tech., M. Tech. and Ph.D. degrees in Electronics Engineering from Aligarh Muslim University, Aligarh, India, in 2001, 2007 and 2012, respectively. He is presently working as an Assistant Professor in the Department of Electronics Engineering, AMU, Aligarh. Prior to joining Aligarh Muslim University as a Lecturer, he has been associated with Siemens, DRDO and National Institute of Technology, Jaipur. His research interests include analog VLSI, analog signal processing and neuromorphic circuits. He has published around 70 research papers in reputed international journals & conferences and authored 2 books and contributed 3 book chapters. He is also the recipient of the prestigious Young Faculty Research Fellowship by Department of Electronics and IT, Ministry of Communications and Information Technology, Govt. of India.

 

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