Chandan Karfa

Ph.D. Students

Priyanka Panigrahi 

Priyanka Panigrahi
July 2017-
Area: Security Analysis of Compiler Optimizations
Email: priya176101006@iitg.ac.in

Nilotpola Sarma 

Nilotpola Sarma
January 2021-
Area: Security Verification
Email: s.nilotpola@iitg.ac.in

Praveen Karmakar 

Praveen Karmakar (Joint supervision with Dr. Sukanta Bhattacharjee)
July 2022-
Area: Hardware Security
Email: pkarmakar@iitg.ac.in

Akash Lal Dutta 

Akash Lal Dutta (Joint supervision with Dr. Sukanta Bhattacharjee)
July 2022-
Area: ML for EDA
Email: akash@iitg.ac.in

Bhabesh Mali 

Bhabesh Mali
July 2023-
Area: ML for Security
Email: m.bhabesh@iitg.ac.in

Graduated Ph.D. Students

Ramanuj Chouksey 

Dr. Ramanuj Chouksey
August 2016- August 2020
Theis Title: Formal Verification and Security Analysis of High-level Synthesis
Email: r.chouksey@iitg.ac.in
Next Position: Lead Engineer at Cadence

Surajit Das 

Dr. Surajit Das (Joint supervision with Dr. Santosh Biswas)
August 2016- May 2022
Thesis Title: Formal Modeling of Network-on-Chip and its Applications in Starvation and Deadlock Detection and in Developing Deadlock Free Routing Algorithms
Email: d.surajit@iitg.ac.in
Next Position: Intel India Post-Doctoral Fellow.

Mohammed 

Dr. Mohammed Aderehman Adem
January 2018- October 2022
Thesis Title: Reverse-Engineering of High-level Synthesis and Its Applications
Email: ma.adem@iitg.ac.in
Next Position: Faculty at Defence Engineering College, Ethiopia.

Debabrata Senapati 

Dr. Debabrata Senapati (Joint supervision with Dr. Arnab Sarkar)
July 2017- June 2023
Area: Scheduling in Multi-Processor Systems
Email: debab176101003@iitg.ac.in

M.Tech. Students

Vaishali Chaudhari 

Vaishali Chaudhari
2022-2024
Broad Area: Hardware Security

Anuj Singh Thakur 

Anuj Singh Thakur
2022-2024
Broad Area: Hardware Security

Karthik Maddala 

Karthik Maddala
2022-2024
Broad Area: Compiler Security

Debarpan Jana 

Debarpan Jana (with Dr. Sukanta Bhattacharjee)
2022-2024
Broad Area: Attack on ML models

Debarpan Jana 

Ayush Mandloi (with Dr. Sukanta Bhattacharjee)
2022-2024
Broad Area: Logic Locking

Jatin Gupta 

Jatin Gupta (Part time student)
2021-2024
Broad Area: Logic Locking

B.Tech. Students

Anmoldeep Singh 

Anmoldeep Singh
2019-2023
Area: Logic Locking

Anmoldeep Singh 

G. Sai Ram Moham
2019-2023
Area: NoC Security

Sujeet Narayan Kamble 

Sujeet Narayan Kamble
2019-2023
Thesis: HLS

Chandrabhushan Reddy 

Chandrabhushan Reddy
2019-2023
Area: ML for EDA

Harshwardhan Bhakkad 

Harshwardhan Bhakkad
2019-2023
Area: ML for EDA

Kartik Sharma  

Kartik Sharma
2019-2023
Area: Logic Locking

M. Samson  

M. Samson
2019-2023
Area: RTL Taint Analysis

Hetang Patel 

Hetang Patel
2019-2023
Area: ML for EDA

Dhruv Shah 

Dhruv Shah
2019-2023
Area: Security fo ML Model

Graduated M.Tech. Students

Divyanshu Nauni 

Divyanshu Nauni
2021-2023
Thesis: Logic Locking: Analysing the Area and Latency Overhead of Locked Designs

Prosenjit Biswas 

Prosenjit Biswas
2021-2023
Thesis: C to RTL Equivalence Checking

Rittick Mondal 

Rittick Mondal
2021-2023
Thesis: Scalable SMT Attack on Higher Level Locking

Shubham Sachan 

Shubham Sachan (Jointly with Dr. Prithwijit Guha)
2021-2023
Thesis: Predicting Robustness of Logic Locking

Subham Das 

Subham Das (Part time student)
2020-2023
Thesis: Attacks on locked Combinational and Sequential circuits

Mukul Chaturvedi 

Mukul Chaturvedi
2020-2022
Thesis: Verification of Dataflow Optimization in Array-Intensive Programs

Abhik Paul 

Abhik Paul
2020-2022
Thesis: Information Leakage Analysis of Compiler Optimizations

Navjot Singh 

Navjot Singh
2020-2022
Broad Area: Logic Encryption at Higher Abstraction Level

Rupak Gupta 

Rupak Gupta
2019-2021
Thesis: Hardware Trojan Detection in High-level Synthesis Generated RTLs

Jayprakash 

Jayprakash Patidar
2019-2021
Thesis: An RTL-to-C Reverse Engineering based Fast Simulation Framework for High-level Synthesis

Arshdeep Kaur 

Arshdeep Kaur
2019-2021
Thesis: A Statistical Approach to Measure Robustness of Gate-Level Logic Locking

Gagan Gayari 

Gagan Gayari (Jointly with Dr. Prithwijit Guha)
2019-2021
Thesis: Genetic Algorithm based Attack on Register Transfer Level Locking

Jay Oza 

Jay Oza
2018-2020
Broad Area: Fast Simulation of HLS

Yom Nigam 

Yom Nigam
2018-2020
Broad Area: RTL Locking

SAMUJJAL 

SAMUJJAL DAS
2017-2019
Broad Area: Property Checking in Business Process Model

SACHIN 

SACHIN KUMAR MADDHESHIYA
2017-2019
Broad Area: Equivalence Checking

SUVARIYA AMIT 

SUVARIYA AMIT ASHOKBHAI (Joint supervision with Dr. Santosh Biswas)
2017-2019
Broad Area: NoC Verification: Deadlock Detection CFSM

RAJESH 

RAJESH KUMAR JHA (Joint supervision with Dr. Santosh Biswas)
2017-2017
Broad Area: DSL specific HLS

Pankaj Kumar Kalita 

Pankaj Kumar Kalita
2016-2018
Broad Area: Equivalence Checking

Pavan Ganesh Jeereddy 

Pavan Ganesh Jeereddy (Joint supervision with Dr. Santosh Biswas)
2016-2018
Broad Area: NoC Verification: Deadlock Detection Using by Bottom Up Approach

Ajinkya Sanjay Mankar 

Ajinkya Sanjay Mankar (Joint supervision with Dr. Santosh Biswas)
2016-2018
Broad Area: NoC Verification: Deadlock Detection Using Dynamic Graph Generation

Graduated B.Tech. Students

Tanay Maheshwari 

Tanay Maheshwari
2019-2023
Thesis: Counter Example Generation for Insecure Transformation of Compiler Optimizations

Vignesh Rao 

Vignesh Ravichandra Rao
2019-2023
Thesis: Power Side Channel Secure RTL Design

Marpina Bharani 

Marpina Bharani
2019-2023
Thesis: Scalable attack on Combinational Circuits

Ritik Kumar 

Ritik Kumar
2019-2023
Thesis: High level Syntehsis and Optimization of ML Models

Bodavula Teja Sai Srikar 

Bodavula Teja Sai Srikar
2019-2023
Thesis: Translation Validation of High Level Synthesis

Saaketh Gunti 

Saaketh Gunti
2019-2023
Thesis: SAT Based Attacks on Machine Learning Models

Rahul Reddy Peddaiahgari 

Rahul Reddy Peddaiahgari
2019-2023
Thesis: Predicting outputs of RTL circuits using Machine Learning

Naresh 

Naresh Bharasagar
2018-2022
Thesis: Formal Verification of Security Countermeasures Against Power Side-Channel Attacks

Pooja Gajendra Bhagat 

Pooja Gajendra Bhagat
2018-2022
Thesis: Security-Aware DAG Scheduler for Heterogeneous Distributed Systems

Param Aryan Singh 

Param Aryan Singh
2018-2022
Thesis: Hardware Security against IP Theft

Kousik rajesh 

Kousik Rajesh
2018-2022
Thesis: Temperature-aware Makespan Minimizing DAG Scheduler for Heterogeneous Distributed Systems

Dristiron Saikia 

Dristiron Saikia
2018-2022
Thesis: Security Analysis of C/C Programs

Shivam 

Shivam Kumar Agarwal
2018-2022
Broad Area: Formal Verification Of Security Measures Against Timing Side-Channel Attacks

Soumik 

Soumik Paul
2017-2021
Broad Area: Hardware Trojan Detection in Post-silicon Validation

Vermuri Sahithya 

Vemuri Sahithya
2017-2021
Broad Area: Analysis of Information Leakage in LLVM Compiler

Rakesh Reddy 

T. Rakesh Reddy
2017-2021
Broad Area: Data-driven Equivalence Checking

Harshavardhan 

Rajanala Harshavardhan Reddy
2017-2021
Broad Area: Logic Locking

Rashi 

Rashi Singh (Jointly with Dr. S. Bhattacharjee)
2017-2021
Broad Area: Compiler Security

Aadil 

Aadil Hoda
2016-2020
Broad Area: Logic Locking

Shimona 

Shimona Verma
2016-2020
Broad Area: Hordware Trojan Detection

Abhishek 

Abhishek Bhardwaj
2016-2020
Broad Area: Equivalence Checking of Programs

Abhisheh Suryavanshi 

Abhisheh Suryavanshi
2016-2020
Broad Area: HLS Obfuscation

Harshit 

HARSHIT BANSAL
2015-2019
Broad Area: Verification of Deep Neural Networks

Mayank 

MAYANK YADAV
2015-2019
Broad Area: Verification of Deep Neural Networks

Ayush 

AYUSH SONI
2015-2019
Broad Area: Deep Steganography

Ayush 

AYUSH SINGH
2015-2019
Broad Area: Verification of Database Driven Applications

Manish Kumar Regar 

Manish Kumar Regar
2014-2018
Broad Area: Bottom-up Equivalence Checking

SHAH HET 

Shah Het Jageshkumar
2014-2018
Broad Area: High-level Synthesis

Datir Vivek Prabhakar 

Datir Vivek Prabhakar
2014-2018
Broad Area: High-level Synthesis

Abhisheh Kumar 

Abhisheh Kumar (working with Dr. Deepak Garg (MPI))
2014-2018
Broad Area: Type systems and secure compilation of web assembly.

Jayesh Mathur 

Jayesh Mathur (Jointly with Dr. Santosh Biswas)
2014-2018
Broad Area: Loop Invariant Generation

Ravi Kumar 

Ravi Kumar
2013-2017
Area: Program Equivalence using CVC4

Jitendra Choudhary 

Jitendra Choudhary
2013-2017
Area: Program Equivalence using CVC4 (joint project with Ravi Kumar)

Siddharth Kumar 

Siddharth Kumar
2013-2017
Area: Verification of Testability Transformations

Pallavi Yellamelli 

Pallavi Yellamelli (Jointly with Dr. Sharmistha Banerjee (DoD))
2013-2017
Area: Design and Development of a Material Selection Software