CS221:Digital Design

Instructor: Dr. A. Sahu


Semester Marks
Course Structure | Lecture Slides | Assignments | Books | ClassTiming, Venue and Rules

Course Structure:


Lecture Slides:

Thanks to Prof. Anshul Kumar (CSE, IIT Delhi), Frank Vahid (Book Author Digital Design) for providing PDF/PPT Slides
  1. 26 JUL 2011: Introduction to Digital Design PDF Slides
  2. 27 JUL 2011: Number System PDF Slides
  3. 01 AUG 2011: Operations in Number System and Boolean Algebra PDF Slides
  4. 02 AUG 2011: Boolean Algebra and TheoremsPDF Slides
  5. 03 AUG 2011: Gates, Truth Table, Min Term, MaxTerm, Canonical Form PDF Slides [[[Mano Book and Vahid Book]]]
  6. 08 AUG 2011: KMap-Logic Minimization PDF Slides
  7. 09 AUG 2011: KMap-Logic Minimization PDFSlides
  8. 10 AUG 2011: KMap-Logic Minimization PDFSlides

  9. 16 AUG 2011: Logic Minimization and complexity of Algorithms No Slides
    17 AUG 2011: Quiz (BCD to 7 Segment Decoder) No Slides

  10. 19 AUG 2011: MUX and Decoder, Logic Implementation using MUX/Decoder PDF Slides
  11. 22 AUG 2011: Adders/BCD Adder Delays, Quine-McCluskey (QM) Logic Minimization Motivation and Examples PDF Slides
  12. 23 AUG 2011: QM Examples and Programming Method, Complexity PDF Slides[[[Mano Book]]]

  13. Assignment 1: Statement of Assignments 1

  14. 24 AUG 2011: Sequential Logic Design: SR Latch PDF Slides
  15. 29 AUG 2011: SR Latch (Race Condition: Ensure, Stabilize, Store), D latch, Clocked Flip Flop PDF Slides
  16. 30 AUG 2011: FlipFlop: Level/Edge Sensitive, Master Slave, J-K and FF Universality, Characteristic Equations PDF Slides [[[ Givone Book]]]
  17. 05 SEP 2011: Register (Storing State Example), Introduction to FSM PDF Slides
  18. 06 SEP 2011: FSM and Examples PDF Slides
  19. 07 SEP 2011: FSM Controller Implementation PDF Slides [[[ Vahid Book]]]
  20. 12 SEP 2011: FSM Controller Examples: Press button Sync, Sequence Generator, 2 bit Binary Counter, FSM Controller using Other FFs PDF Slides
  21. 13 SEP 2011: Counters, Top Down Approaches to Digital System, Frequency Divider, Timer, Digital ClockNo Slides
  22. 14 SEP 2011: Counters (Binary(Sync/Async), Mod N Counter, FF Excitation Table, Counter using D/T/JK/RS FFs) PDF Slides [[[ Givone Book]]]

  23. 20 SEP 2011 : Mid Semester Exam 10AM-12Nn: Exam Venue (Room 2201/2202/2203/2204) Question Uploaded on 8th Oct

  24. 26 SEP 2011: Mid Semester Question and Model Answer Discussion PDF Slides
  25. 27 SEP 2011: Counter Based on Shift Register PDF Slides
  26. 28 SEP 2011: Designing of Multi Function Register PDF Slides [[[ Vahid Book ]]]
  27. 11 OCT 2011: Adder (Basic Model: Ripple carry Model), Carry Analysis (Generation, Propagation, Kill) PDF Slides [[[ Ercegovac and Lang Book ]]]

  28. [[[Supplementary Material:http://www.cs.ucla.edu/digital_arithmetic/files/ch2.pdf ]]]
  29. 12 OCT 2011: Adder Manchester, Carry Skip and Carry Select PDF Slides
  30. 14 OCT 2011: Adder Delay Analysis: RCA, mRCA, CSkipA, CSelA and Logarithmic Adder (Carry look ahead Adder) PDF Slides [[[ Ercegovac and Lang Book ]]]
  31. 17 OCT 2011: Multiplication and quiz PDF Slides
  32. 18 OCT 2011: Multiplication PDF Slides
  33. 19 OCT 2011: Division PDF Slides
  34. 24 OCT 2011: Floating points: Representation (float,double), Density, Operation and Accuracy (X+1=X) PDF Slides

  35. 25 OCT 2011: HDL IntroductionPDF Slides
  36. 28 OCT 2011: VHDL: Syntax, Model, Test Bench and Tool (GHDL and GTKWAVE) PDF Slides
  37. 31 OCT 2011: VHDL: Test Bench, Package, Library, Generic/generate, (Adder, Mux, Register) PDF Slides
  38. 01 Nov 2011: VHDL: Model and Synthesis PDF Slides

  39. 02 Nov 2011: Introduction to High level Synthesis [[No Slides]]
  40. 07 Nov 2011: Introduction to VLSI Design for ASIC(Clock, Power, Placement, Routing) [[No Slides]]
  41. 08 Nov 2011: Introduction to FPGA Design [[No Slides]]
  42. 14 Nov 2011: Introduction to Embedded System [[No Slides]]

  43. 15 Nov 2011: Feedback, Summery of CS221, Future Courses,End Semester Exam Pattern [[No Slides]]

Assignments:

  • Assignment 3: Implement an 32 bit unsigned integer multiplier using VHDL programming language and GHDL tools: (10 marks) Announced On 31-Oct-2011, Deadline:12-Nov-2011


  • Assignment 2: Writing C/C++ program to report optimal group size for carry skip addition (10 marks) Announced On 16-Oct-2011, Deadline:26-Oct-2011


  • Assignment 1: Implementation of Quine-McCluskey Logic Minimization (10 marks) Announced On 25-Aug-2011, Deadline:10-Sep-2011



  • Books:

    Text:
    1. Frank Vahid, Digital Design (Preview Edition), Wiely India Edition, 2005
    2. M. Morris Mano and M. D. Ciletti, Digital Design, 4/e, Pearson Education, 2007.
    3. Donald D. Givone, Digital Principles and Design, McGraw-Hill, 2003
    References:
    1. Ercegovac and Lang, Digital Arithmetic, Morgan Kauffman, 2004
    2. R. H. Katz and G. Boriello, Contemporary Logic Design, 2/e, Prentice Hall of India, 2009.

    Class timing, Venue and Rules: