Course Structure:

• Boolean Algebra and switching functions; Minimization and realization using logic gates, ROMs, PLAs, multiplexers; Circuits for code conversion;
• Flip-flops, registers, counters; Finite state model: State tables and diagrams; State minimization; Excitation functions of memory elements; Synthesis of synchronous sequential circuits; Representation and synthesis using ASM charts; Incompletely specified machines; Specification and synthesis of asynchronous sequential machines; Number representation: fixed and floating point; Addition, subtraction, multiplication and division of numbers. Current trends in digital design: ASIC, FPGA, etc.;

Lectures: Post Mid Sem part

1. 25 SEP 2019 (THU): Sequential Circuit, Latch, RS Latch, Race Condition, Ensure no RS=11, Stabilize with Enbale/C, Store (Level Sensitive Latch) [[ Ref Section 3.1 and 3.2 of VahidBook, Ref Section 5.2-5.4 of ManoBook]] PDF Slides


2. 26 SEP 2019 (THU): RS-Latch, D-Latch, Problem of D-Latches in Sift-Reg Design, Level sensitive vs Edge sensitive, D-Flip Flop design using Master-Slave D-Latches, JK-FlipFlop, Universality of JK-Flipflop, Design of T-FF, JK-FFs and RS-FF using D-FFs and using of characteristics equation of FFs [[ Ref Section 3.1 and 3.2 of VahidBook, Ref Section 5.2-5.4 of ManoBook]] PDF Slides


3. 27 SEP 2019 (FRI): Characteristics equation of FFs, Register, Register with Load, Sift Register, Universal register with SISO and PIPO support (left sift, right shift and parallel load), memory design (PIPO Reg with Select and WR signal, MAR, MBR, Decoder) [[ Ref Section 6.1 and 6.2, and Section 7.3 of ManoBook ]] PDF Slides


4. 03 OCT 2019 (THU): Counter, Async CTR, Sync CTR, Modulo Ctr, Up-Down Counter, Register Based Counter, Design of Digital Clock (with set time) [[ Ref Section 6.3 and 6.5 of ManoBook, Section 6.8 and 6.9 of GivoneBook ]] PDF Slides


5. 04 OCT 2019 (FRI): FSM, FSM Definition, Moore Machine, Melay Machine, FSM examples, FSM of FFs, FSM implemenation using D-FFs, Characteristics table of FFs, FSM next state logic, FSM output logic [[ iRef Section 3.3, 3.4 and 3.5 of Vahid Book, Ref Section 6.1 and 6.2, and Section 7.3 of ManoBook ]] PDF Slides


6. 16 Oct 2019 (WED): QUIZ B1



7. 17 OCT 2019 (THU): Discussion about Quiz question, Example of FSMs (Parity Encoder, Sequence generator, Keyboard button stabilizer, digital sequence lock S-R1-B-G-R2), FSM implemenation using D-FFs, Characteristics table of FFs, FSM next state logic, FSM output logic [[ Ref Section 3.3, 3.4 and 3.5 of Vahid Book, Ref Section 6.1 and 6.2, and Section 7.3 of ManoBook ]] PDF Slides


8. 18 OCT 2019 (FRI): Example of FSMs (Digital sequence lock S-R1-B-G-R2), Multi-Arc and merging of Multi-arc, FSM of Register, Counter, Complete/Stable FSM, Excitation table of FFs, Comparision of FSM Counter implementation using different FFs [[ Ref Section 3.3, 3.4 and 3.5 of Vahid Book, Ref Section 6.9 of GivoneBook ]] PDF Slides


9. 23 OCT 2019 (WED): FSM examples: melay and moore machines [[ Ref Section 14 of Kumar BOOK and Sec 3.4 and 3.5 of Vahid Book, Ref Section 6.9 of GivoneBook ]] PDF Slides


10. 24 OCT 2019 (THU): FSM State optimization: Row matching method, Partitioning method [[ Ref 14.6 and 14.7 of KumarBook, Ref Section 8.1.1 KatzBook ]] PDF Slides


11. 25 OCT 2019 (FRI): FSM State optimization: Implication methods [[ Ref Section 8.1.2 KatzBook ]] PDF Slides


12. 30 Oct 2019 (WED): QUIZ B2 Model Sol B2S.pdf


13. 31 OCT 2019 (THU): FSM State encoding [[ Ref Section 8.2 KatzBook ]] PDF Slides


14. 01 NOV 2019 (FRI): FSMD: ASM Chart and RTL Design [[ Chapter 8 of ManoBook and Chapter 15 of KumarBook ]] PDF Slides


15. 06 NOV 2019 (WED): FSMD: ASM Chart and RTL Design [[ Chapter 8 of ManoBook and Chapter 15 of KumarBook ]] PDF Slides


16. 07 NOV 2019 (THU): FSMD: ASM Chart and RTL Design example (simple R3=R1+R2, Mod 14 Ctr, Sequential Multiplier) [[ Chapter 8 of ManoBook and Chapter 15 of KumarBook ]] PDF Slides


17. 08 NOV 2019 (FRI): FPGA and HDL [[ ]] PDF Slides


18. 13 Nov 2019 (WED): QUIZ B3 CS221-QB3.pdf



19. 14 Nov 2019 (THU): Discussion on Advanced topics and HDL Example VHDL Examples
20. 15 Nov 2019 (FRI): Discussion on Advanced topics

Text Books:

1. ManoBook: M. Morris Mano and M. D. Ciletti, Digital Design, 4/e, Pearson Education India, 2007.
2. KumarBook: A. Anand Kumar, Fundamentals of Digital Circuits 3rd Edition, PHI. 2014 ((This book have a lot of examples to understand the concepts))

1. GivoneBook: Donald D. Givone, Digital Principles and Design, McGraw-Hill, 2003
2. VahidBook: Frank Vahid, Digital Design (Preview Edition), Wiely India Edition, 2005
3. KatzBook: Randy H. Katz, G Borriello, Contemporary Logic Design, 2nd Edition, PHI, India, 2009 ExternalLink PDF version
4. HDLBook: Douglas L. Perry, VHDL: Programming By Example , 4th Edition, Mcgraw Hill Education, 2008 PDF Version
5. VHDL Primer by J Bhaskar A good book to written consizely

Class timing, Venue and Rules:

• Venue: L1, Timing: Wed 9AM-10AM, Thu 10AM-11APM, and Fri 11AM-12Nn
• Post mid sem part will have 3 quizes, each carrying 5% of total mark
• End sem carry 35% of post-mid sem part